Boot-set res5 0 PCB config=1, PCB ckeck=0 DRAM Channel A Calibration. DRAM A Size = 1024 Mbytes. DRAM Channel B Calibration. DRAM B Size = 1024 Mbytes. DRAM Channel C Calibration. DRAM C Size = 512 Mbytes. Boot Start Pmain 0x0000a000 0x0000a000 EMMC boot CID:0xdcdb66cd :0x5206951b :0x4a544434 :0x15010041 LZHS addr:0x00100040 LZHS size:0x00176848 LZHS checksum:0x00000034 LZHS size:0x00176848 store RSA & AES keys in DMX SRAM LZHS begin Boot Start Lmain POWER ON MT5891 Boot Loader v0.9 [Check Recovery mode KEY]======================================== Boot reason: A/C power on!![Check Recovery mode KEY]PDWNC_ReadWakeupReason: 6 [Check Recovery mode KEY]PDWNC_ReadWakeupReason: 6 [Check Recovery mode KEY]PDWNC_ReadServoADCChannelValue: 1023 [Check Recovery mode KEY]PDWNC_ReadServoADCChannelValue: 3ff [Check Recovery mode KEY]======================================== [Check Recovery mode KEY]It is LEFTRIGHTPOWER or no pressing from LKB LOADER_MtkEnvInitFunc : ui4_RebootEventDetailEepAddr = 0xa1a [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] ext_csd is empty get_mmcsize emmc_size2 0x00000000 00000000 [MSDC] LOADER FAST READ EMMC! ==Loader emmc pinmux set result 0x1000a0, arbitor 0x20 Init config, cid = 0x15010041, dsc=0xdcdb66cd,rca=0x5206951b,ocr=0x4a544434 [MSDC] 15010041:4a544434:5206951b:dcdb66cd [MSDC] id1:00414a54 id2:44345206 [MSDC] eMMC Name: UNKNOWN ---Set FIFO path and Init--- [MSDC] Set Bus Clock as HS25(MHz) Success!,src 3 ,mode 0, div 4 Use NEW AutoK idea ,ignore the old ett param [MSDC] Set pad driving as 1 ! [eMMC2DRAM]enter into SDR50 Mode, max dtr 200000000 [MSDC] Set Bus Clock as HS0(MHz) Success!,src 0 ,mode 0, div 16 Use NEW AutoK idea ,ignore the old ett param [MSDC] Set pad driving as 0 ! [MSDC] Set Bus Clock as HS50(MHz) Success!,src 3 ,mode 0, div 2 Use NEW AutoK idea ,ignore the old ett param [MSDC] Set pad driving as 1 ! get_mmcsize emmc_size2 0x00000003 a3e00000 [MSDC] Saved info: id1 = 0x66cd5206, id2=0x951b4a54,flag 0xaabbccdd,speedmode 5, dlycell 79 Support HS400, card type ext_csd[196]0x57 Support HS200, card type ext_csd[196]0x57 u4mask = 0x3 [MSDC] Cur info: id1 = 0x66cd5206, id2=0x951b4a54,flag 0xaabbccdd,speedmode 5, dlycell 79 [MSDC] -----The information is match, Alrady run autok before, ignore this time-- [MSDC] Load Param: ---Set FIFO path and Init--- [MSDC] Clock frequency = 900 MHz, Clock period = 1111 ps, 1 delay cell = 14 ps [MSDC] TCMGET_DLYCELL_PERT = 79 =========================================== [QHB flag] rDtvCfg.u1Flags4 =0 [HB flag] rDtvCfg.u1Flags2 =0 [QHB flag] prLdrData->rDtvCfg.u1Flags4 = 0 [HB flag] prLdrData->rDtvCfg.u1Flags2 = 0 =========================================== set 223 to low. LOADER_MtkEnvInitFunc: PDWNC_ReadWakeupReason = 6 [2K17_gpio] AC, set EEPROM_TPV_ENABLE_QHB_ADDRESS to 0 [QHB] Previous system state is on, not enter QHB. [QHB] u1EmmcFirstBoot = 0x1 [QHB] It is not EmmcFirstBoot, do no cation with QHB. LOADER_MtkEnvInitFunc: set ui1_reboot_event_detail to 0 LOADER_MtkEnvInitFunc: ui1_reboot_event_detail = 0 (read back) read from eeprom ioff 0 phy_off 3360 lbz: get _u1AtmosEnable = 0 ************pu1DrvLoadHdmi14Edid u1Index1= 1 lbz: get _u1AtmosEnable = 0 ************pu1DrvLoadHdmi20Edid u1Index1= 1 _LOADER_ResetWiFi_1st Support network!1st MAC in EEP is valid (70:af:24:ac:74:17) 1st : (70:af:24:ac:74:17) 2nd : (70:af:24:ac:74:17) Remove Quiet Boot misc control in eeprom when Watchdog reason. IR DATA register : 0x 0 T8032 init A/C on case loader stage... Load T8032 FW (addr: 0x d63fac, size: 24849)success!! T8032 FW version: 6 T8032 change to loader stage... header check ok digest check ok read done ConsoleLock_to_T8032 (0x0) LDR_FlashCopy 0xf010 0x71c80 0x80 LOADER_MtkEnvInitFunc : ui4_RebootEventDetailEepAddr = 0xa1a =========================================== [QHB flag] rDtvCfg.u1Flags4 =0 [HB flag] rDtvCfg.u1Flags2 =0 [QHB flag] prLdrData->rDtvCfg.u1Flags4 = 0 [HB flag] prLdrData->rDtvCfg.u1Flags2 = 0 =========================================== set 223 to low. header check ok digest check ok read done writer done header check ok digest check ok read done CC_PHP_SUPPORT_LOADER_CONSOLE_LOCK defined Uart Rx disabled header check ok digest check ok read done ConsoleLock_to_T8032 (0x0) [UPG upgrade ~ PDWNC_WAKE_UP_REASON_AC_POWER] u1SlicneUpgradeStatus = 0 Org:0x30 Flags:0x30 Before u1EmmcFirstBoot = 0x1 Do not need to configure boot flag After EmmcFirstBoot Org:0x30 Flags:0x30 After u1EmmcFirstBoot = 0x1PDWNC_Init normal cold boot ui1_silent_reboot = 0 After check ui1_silent_reboot, [QHB]u1Flags4: org=0, flag4=0 ui4_CtnEepAddr : 0x980 CTN is not XXPUS9104 u1RedLedBriValue : 15 efrcpowerGpio=256 [OLED Tcon error handle][GPIO_MtkPowerOnFunc 1350]display_techonlogy = 1 [OLED Tcon error handle][GPIO_MtkPowerOnFunc 1354] EEPROM_TCON_ERROR_COUNT = 3 [Silent upgrade check][GPIO_MtkPowerOnFunc 1360] SILENT_UPGRADE_STATUS_ADDRESS = 0 [OLED Tcon error handle][GPIO_MtkPowerOnFunc 1368]EEPROM_TCON_ERROR_COUNT>=3, power off FRC keep FRC power rDtvCfg.u1Flags4 = 0, PDWNC_ReadWakeupReason() = 6 After FRC power, [QHB]u1Flags4: org=0, flag4=0 eResetfrcGpio=51 set 223 low. USB0: Set GPIO42 = 1. USB1: Set GPIO43 = 1. USB2: Set GPIO44 = 1. USB3: Set GPIO210 = 1. Normal Boot (Not Quiet Boot) u4BmpAddress_philips_logo:0xd8e360 u4BmpWidth_philips_logo:476 u4BmpHeight_philips_logo:242 au1PhilipsLogoBmpSize:460768 au1PhilipsLogoBmpDrawBuffer_size/2:952000 au1PhilipsLogoBmpSize/2:230384 u4DstAddress_philips_logo:0xbd3510 Display 0x00e775b4 background:0x00000000 |||||||u1FRC = au1Index 1; [GraphMode_SetPanelType] panel_type=5 [GraphMode_SetPanelType] panel_type=1 Hardcode panel id 11 for EU11 with NT334... [opcode::UHD=2,HDR=3,FRC=1,BACKENDPQ=0,FLIP/MIRROR=0,Channel decode 5,Frequency=1,DNM=2,IsMjcSup=51, Panel id =1,opcode end&&&&&&] [Dynamic PNL] Find VideoModeAttribute[116]: PNL_Index=0x6000b [DisplayInit]EU=0x39, US=0x0 [DisplayInit]CountryDefault=0x39 [SA7] vDDDSInit [DisplayInit] ##1 SV_DCLK_50HZ |||||||u1FRC = au1Index 1; [LVDS]vDrvApplyPanelTiming..... vDrvResetVOPLLFlowFlag ###VbyOne VOPLLInit finsih###vDrvSetOCLKClockSchemaInit. ###VbyOne VOPLLSet finsih###[SA7] _fgVopllUseDDDS = True @vDrvSetVOPLLClockSchema -->normal [LVDS] VOPLL Initialize successful ! vApiPanelPowerSequence= TRUE (START)VB1 VB1 impedance cal pass and value =3 ................. VB1 VB1 impedance cal set to default terminaion 8......................... [VB1][LOCKN] 0x709c set to FUNCTION2 [VB1][HTPDN] 0x7097 set to FUNCTION2 [VB1][SetPadOn] DUAL_PORT [VB1][SetPadOn] GM_LANE_1 [VB1][SetPadOn] u1LaneCnt=2, u1GraphLaneCnt=10 LVDSA_EXT_EN: B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 LADSA_pad: ECK(L9) E4(L11) E3(L10) E2(L8) E1(L7) E0(L6) OCK(L3) O4(L5) O3(L4) O2(L2) O1(L1) O0(L0) u2PadOn=0x1, pu4LaneMap[u1Lane]=8 au4PadRemapTbl[0]= 0 u2PadOn[0]=0x1 u2PadOn=0x3, pu4LaneMap[u1Lane]=9 au4PadRemapTbl[1]= 1 u2PadOn[1]=0x3 u2PadOn=0x3, pu4LaneMap[u1Lane]=10 au4PadRemapTbl[2]= 2 u2PadOn[2]=0x3 u2PadOn=0x3, pu4LaneMap[u1Lane]=11 au4PadRemapTbl[3]= 5 u2PadOn[3]=0x3 u2PadOn=0xb, pu4LaneMap[u1Lane]=0 au4PadRemapTbl[4]= 3 u2PadOn[4]=0xb u2PadOn=0x1b, pu4LaneMap[u1Lane]=1 au4PadRemapTbl[5]= 4 u2PadOn[5]=0x1b u2PadOn=0x1b, pu4LaneMap[u1Lane]=2 au4PadRemapTbl[6]= 6 u2PadOn[6]=0x1b u2PadOn=0x1b, pu4LaneMap[u1Lane]=3 au4PadRemapTbl[7]= 7 u2PadOn[7]=0x1b u2PadOn=0x1b, pu4LaneMap[u1Lane]=4 au4PadRemapTbl[8]= 8 u2PadOn[8]=0x1b u2PadOn=0x1b, pu4LaneMap[u1Lane]=5 au4PadRemapTbl[9]= 11 u2PadOn[9]=0x1b u2PadOn=0x1b, pu4LaneMap[u1Lane]=6 au4PadRemapTbl[10]= 9 u2PadOn[10]=0x1b u2PadOn=0x1b, pu4LaneMap[u1Lane]=7 au4PadRemapTbl[11]= 10 u2PadOn[11]=0x1b [VB1][SetPadOn] LVDSA_EXT_EN=0x1b [LVDS][backlight] DeltaTime=0 us-->no need to enable BL_DLYTIME_CUT!! LDR_isRecoveryMode function call start LDR_PanelLogo b_Result == TRUE. LDR_OsdDisplay(14, 0x371e0000, 1, 1) [OSD]Before PQ Module offset:i4H=402 i4V=6 [OSD]DBG XvYCC bypass [OSD]DBG Gamma position 0 or 1 [OSD]After PQ Module offset:i4H=259 i4V=6 display_techonlogy = 1 CTN = 55OLED803/12 OLED,delay 5 seconds for logo showing ui1_CtnBuf[6] = 0x38 ,ui1_CtnBuf[7] = 0x30 ,ui1_CtnBuf[8] = 0x33 CTN is not XXOLED903, no need to show B&W logo u4UpgUpgrading = 0 [LDR]_factoryCmdUpgradeByFunctionType_init is called [LDR] ui4_upgradeDeviceTypeAddr : 0x7200 [LDR] ui1_upgradeDeviceType : 0x0 [LDR] ui1_functionType : 0xff [LDR]_factoryCmdUpgradeByFunctionType_isSkipUpgradeEnabled is called, ui1_functionType == 4 [LDR]_factoryCmdUpgradeByFunctionType_isSkipUpgradeEnabled return FALSE Do USB upgrade u1USBBlock = 0x017d1b40 USB: Vbus turn up time = 8415 ms, Max =0 ms. No USB device. /dev is created. /mnt is already existed. That is OK. /dev/msdc is created. /mnt/msdc_0 is created. ERR: mount /dev/msdc_0 as /mnt/msdc_0 fail. return value:-25 Error: SD mount fail, USB upgrade stop No cookie file or no Usb detected... Call LDR_setUnBoxUpgradeNvmFlag at line:1444 @ui4_unboxEepAddr is 0x3177 @ui1_unboxEepBuffer[0] is 0 @ui1_unboxEepBuffer[1] is 0 [ACD Loader] 12V status = 1,continue booting.recovery_opcode before_ui1_raw_data_1[0]_2[0]_3[0]= 0xfa 0xfa 0xfa before_ui1_raw_data_1[1]_2[1]_3[1]= 0x2c 0x2c 0x2c before_ui1_raw_data_1[2]_2[2]_3[2]= 0x33 0x33 0x33 before_ui1_raw_data_1[3]_2[3]_3[3]= 0x50 0x50 0x50 before_ui1_raw_data_1[4]_2[4]_3[4]= 0x3b 0x3b 0x3b before_ui1_raw_data_1[5]_2[5]_3[5]= 0x50 0x50 0x50 before_ui1_raw_data_1[6]_2[6]_3[6]= 0x00 0x00 0x00 before_ui1_raw_data_1[7]_2[7]_3[7]= 0x8b 0x8b 0x8b before_ui1_raw_data_1[8]_2[8]_3[8]= 0x03 0x03 0x03 before_ui1_raw_data_1[9]_2[9]_3[9]= 0xc3 0xc3 0xc3 before_ui1_raw_data_1[10]_2[10]_3[10]= 0xf4 0xf4 0xf4 before_ui1_raw_data_1[11]_2[11]_3[11]= 0xf6 0xf6 0xf6 before_ui1_raw_data_1[12]_2[12]_3[12]= 0x15 0x15 0x15 before_ui1_raw_data_1[13]_2[13]_3[13]= 0x16 0x16 0x16 before_ui1_raw_data_1[14]_2[14]_3[14]= 0x33 0x33 0x33 before_ui1_raw_data_1[15]_2[15]_3[15]= 0x90 0x90 0x90 before_ui1_raw_data_1[16]_2[16]_3[16]= 0xa1 0xa1 0xa1 before_ui1_raw_data_1[17]_2[17]_3[17]= 0x01 0x01 0x01recovery_opcode(3) recovery_opcode(4) after_ui1_raw_data_1[0]_2[0]_3[0]=0xfa 0xfa 0xfa after_ui1_raw_data_1[1]_2[1]_3[1]=0x2c 0x2c 0x2c after_ui1_raw_data_1[2]_2[2]_3[2]=0x33 0x33 0x33 after_ui1_raw_data_1[3]_2[3]_3[3]=0x50 0x50 0x50 after_ui1_raw_data_1[4]_2[4]_3[4]=0x3b 0x3b 0x3b after_ui1_raw_data_1[5]_2[5]_3[5]=0x50 0x50 0x50 after_ui1_raw_data_1[6]_2[6]_3[6]=0x00 0x00 0x00 after_ui1_raw_data_1[7]_2[7]_3[7]=0x8b 0x8b 0x8b after_ui1_raw_data_1[8]_2[8]_3[8]=0x03 0x03 0x03 after_ui1_raw_data_1[9]_2[9]_3[9]=0xc3 0xc3 0xc3 after_ui1_raw_data_1[10]_2[10]_3[10]=0xf4 0xf4 0xf4 after_ui1_raw_data_1[11]_2[11]_3[11]=0xf6 0xf6 0xf6 after_ui1_raw_data_1[12]_2[12]_3[12]=0x15 0x15 0x15 after_ui1_raw_data_1[13]_2[13]_3[13]=0x16 0x16 0x16 after_ui1_raw_data_1[14]_2[14]_3[14]=0x33 0x33 0x33 after_ui1_raw_data_1[15]_2[15]_3[15]=0x90 0x90 0x90 after_ui1_raw_data_1[16]_2[16]_3[16]=0xa1 0xa1 0xa1 after_ui1_raw_data_1[17]_2[17]_3[17]=0x01 0x01 0x01[CMain 1070][OLED Tcon error handle]display_techonlogy = 1 [CMain 1079][OLED Tcon error handle]EEPROM_TCON_ERROR_COUNT=3. [CMain 1082][OLED Tcon error handle]Go into protection mode. Disable VGA wakeup support WOL _PDWNC_SetupEthernetWakeup(WOL):u4WOWLVal:0x0 wol off, MAC register switch to arm [GPIO_MtkPowerOffFunc]1453 set GPIO 223, value 0. set GPIO 207, value 0. Standby PDWNC_TPV_SetupWakeupSourceWOWLAN: u1Wowlan = 0 PDWNC_TPV_SetupWakeupSourceWOWLAN: uiSwitchOnWithchromecast = 0 PDWNC_TPV_SetupWakeupSourceWOWLAN: u1Wowlan == DISABLE_WOWLAN CTN is not XXPUS9104 u1RedLedBriValue : 15 PDWNC_TPV_SetupSilentReboot: ui1_silent_reboot = 0 PDWNC_TPV_SetupSilentReboot: no need to setup register time of silent reboot PDWNC_EnterPowerDown(0,100) SIF_Master0: V2 design SIF_Master1: V2 design SIF_Master2: V2 design SIF_Master3: V2 design SIF_Master4: V2 design Master5 only Used in secure mode! SWITCH_T8032 ▒" Now is writting DIV_SEL as 0x78! ▒T8032 vSetTimer▒(TconError has detected, Blinking the Led